Chinese semiconductor thread II

tokenanalyst

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VeriSilicon's low-power Bluetooth overall IP solution has passed LE Audio's full functional certification​


VeriSilicon today announced that its low-power Bluetooth overall IP solution has fully supported LE Audio released by the Bluetooth SIG. specifications, including certification for the LE Audio protocol stack and LC3 codec. This solution is suitable for mobile phones, Bluetooth headsets including true wireless stereo (TWS) headsets, speakers, and a wide range of other audio application scenarios. Certification details can be obtained by searching for the solution’s qualified design ID number (206187) on the official website of the Bluetooth SIG.

LE Audio is a new generation of Bluetooth audio technology standard launched by the Bluetooth Technology Alliance based on Bluetooth 5.2 and above specifications, aiming to provide a higher quality audio experience. VeriSilicon's low-power Bluetooth overall IP solution includes radio frequency IP, baseband IP and software protocol stack, and has passed Bluetooth 5.3 certification. This solution is based on Bluetooth low energy technology (BLE), has lower power consumption, and uses synchronous channel (Isochronous Channels) transmission technology to achieve smaller audio transmission delay and better signal quality. In addition, the solution also supports LE Audio’s innovative Bluetooth features such as Auracast™ broadcast audio and Multi-Stream Audio.

VeriSilicon's low-power Bluetooth overall IP solution integrates VeriSilicon's independently developed LC3 codec, which enables real-time, low-power and low-distortion audio processing, and supports 16-bit, 32-bit fixed-point processing and 32-bit floating point. Processing and other calculation precision, as well as all LE Audio audio specifications and configurations to meet the needs of different application scenarios. The LC3 codec is deeply optimized for VeriSilicon's ZSP digital signal processor (DSP), as well as mainstream processors such as Arm Cortex-M and RISC-V. It occupies minimal memory and CPU resources and can be easily transplanted to other MCU and DSP. It can be licensed separately, providing customers with flexible integration options; after integrating with VeriSilicon BLE controller and protocol stack, it can also provide customers with complete LE Audio software and hardware solutions, greatly simplifying the development of high-performance audio products. process.

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tokenanalyst

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Process development of small-size copper-plated InP wafers using 8-inch CMP equipment​

Abstract​

To achieve the thinning and polishing of small-size copper-plated InP wafers using 8-inch chemical mechanical polishing (CMP) equipment, it's essential to enhance equipment compatibility, streamline process steps, and mitigate issues like cracks and surface particles on InP wafers due to excessive handling. Initially, employing custom-made molds allows the processing of small-size InP wafers on 8-inch CMP equipment. Subsequently, to address the brittleness of InP wafers, adjusting the equipment's polishing head pressure, speed, and polishing pad speed, among other process parameters, is crucial to satisfy the demands of the subsequent bonding process. Experimental validation shows that with the use of special molds and the polishing head pressure set to 20.684 kP, along with polishing head and pad speeds of 93 r/min and 87 r/min, respectively, the InP wafer's surface roughness achieves Ra≤1 nm, and the copper layer's removal rate is 3 857×10-10/min. This preparation ensures defect-free bonding with 8-inch wafers, eliminating voids at the bonding interface. The CMP process for 2-inch InP wafers on 8-inch equipment significantly lowers CMP costs, prevents the increase in surface particle size and scratches during wafer transfer, and facilitates hybrid bonding and Cu interconnections between InP and Si wafers.

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mst

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WASHINGTON, March 27 (Reuters) - The United States is asking allies to stop domestic companies from servicing certain chipmaking tools for Chinese customers, a U.S. commerce department official said on Wednesday, as it ramps up efforts to hobble China's chipmaking capabilities.
"We are working with our allies to determine what is important to service and what is not important to service," said export controls chief Alan Estevez, speaking to reporters at an annual conference.
 

ansy1968

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An Adscript from the article, I'll say this again, by late 2024 SMIC will producing N+3 5nm chip, by 2027 when TSMC Arizona FAB will be fully operation with volume production of 5nm, SMIC will be mass producing N+4 3nm chip using an EUVL. China will be surpassing the US even though they had a lot of help from their little Asian friend.


The frustration can be seen from this article maybe TSMC had paid them to wrote this....lol


The plant would produce
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; among the world’s most advanced chips, only behind TSMC’s flagship
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back home in Taiwan. TSMC increased the scale of its investment in 2022
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in response to the CHIPS Act and promising signals from Washington.

But just three years later, TSMC’s plant in Arizona is lagging. Not only has it completely missed its originally promised construction completion mark of 2024, but
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, volume production of the advanced chips won’t start until at least 2027 or 2028.

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14 hours ago — Washington is falling far behind in its commitment to this mission, which is set to become a total failure if serious changes are not made.
 

FairAndUnbiased

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An Adscript from the article, I'll say this again, by late 2024 SMIC will producing N+3 5nm chip, by 2027 when TSMC Arizona FAB will be fully operation with volume production of 5nm, SMIC will be mass producing N+4 3nm chip using an EUVL. China will be surpassing the US even though they had a lot of help from their little Asian friend.


The frustration can be seen from this article maybe TSMC had paid them to wrote this....lol


The plant would produce
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; among the world’s most advanced chips, only behind TSMC’s flagship
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back home in Taiwan. TSMC increased the scale of its investment in 2022
Please, Log in or Register to view URLs content!
in response to the CHIPS Act and promising signals from Washington.

But just three years later, TSMC’s plant in Arizona is lagging. Not only has it completely missed its originally promised construction completion mark of 2024, but
Please, Log in or Register to view URLs content!
, volume production of the advanced chips won’t start until at least 2027 or 2028.

Please, Log in or Register to view URLs content!

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14 hours ago — Washington is falling far behind in its commitment to this mission, which is set to become a total failure if serious changes are not made.
I'm calling it right now:

There are only 2 possible outcomes for Arizona fab. Either it shuts down without producing even a single wafer as a typical 烂尾工程 or it produces exceedingly small volumes and eats subsidies constantly until they get tired of it, gets sold, and is immediately taken off the commercial market. And one of these will happen by 2030.
 

PopularScience

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WASHINGTON, March 27 (Reuters) - The United States is asking allies to stop domestic companies from servicing certain chipmaking tools for Chinese customers, a U.S. commerce department official said on Wednesday, as it ramps up efforts to hobble China's chipmaking capabilities.
"We are working with our allies to determine what is important to service and what is not important to service," said export controls chief Alan Estevez, speaking to reporters at an annual conference.
Local company佳鼎and新毅东can service and refurbish litho machine.
 
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