Chinese semiconductor thread II

AndrewS

Brigadier
Registered Member
Just been doing a little bit more research

"Raymond James estimates that it costs Nvidia around $3,320 to manufacture an H100 GPU. With retail prices averaging between $25,000 and $40,000, this represents a profit of up to 1000%"

Source
the-decoder.com/nvidias-h100-gpu-sells-like-hot-cakes-with-high-profit-margins

---

So if it costs SMIC 50% more (as per FT) to make a Huawei H100 equivalent (Ascend 920), that would be $5000.

But if Huawei then sell it for $40000, that is 8x what it actually cost.

That is a wildly profitable project.

SMIC and Huawei should be making as many of these as they can
 

latenlazy

Brigadier
View attachment 125237View attachment 125238

Some rumors from this guy. Take it for what you will. I would say this is somewhat believable based on other stuff I know

Ascend 920 will be coming in the next few months and ordered by Alibaba, Baidu & Bytedance (big deal since they basically refused Ascend before)
Kunpeng 930 is already being used on Huawei cloud it looks like. With NUMA link, can achieve 128 core 256 threads

N+2 production large enough for 500k to 1 million Ascend chips (I find that hard to believe)
says limitation to Ascend is actually getting HBM3, which is still not domestically produced

Kirin line, will see 7000 (for low end phones like Enjoy series), 8000, 9000sh & 9000sw

Expect P70 & new PC version of Kirin chips using N+2 process

Calls whatever will come in September for Mate 70 and X6 N+2B (rather than N+3)
Aiming for 50% of market and be #1 PC and pad supplier.

Expect huge numbers for Enjoy series. Kirin 7000 series will be very cheap, it sounds like

Expect TSMC N6 type of performance for SMSC process of this year (that's my guess too)
N5 for 2025 (again, also similar to my expectation, maybe not reach N5 exactly, but get close to that in density)

Says plans to work CFET in 2026 ???? Seems ambitious. I find this really suspicious for obvious reasons
Going for CFET at a larger node than the sub 2 nm roadmap everyone else is working with might make sense as a kind of workaround to catch up on transistor performance while being stuck on a larger process. TSMC already showed that FinFET at 3 nm doesn’t push the performance needle much and Samsung is showing GAAFET at 3 nm may be very hard to produce with good quality control. It’s not even guaranteed that when they hit sub 2 nm they’ll be able to develop a CFET process on as quick a timetable as they’re planning. So it might make sense to introduce the architecture earlier if you’re behind on node size and seeing what everyone else is struggling with.
 
Last edited:

Wahid145

New Member
Registered Member
Going for CFET at a larger node than the sub 2 nm roadmap everyone else is working with might make sense as a kind of workaround to catch up on transistor performance while being stuck on a larger process. TSMC already showed that FinFeT at 3 nm doesn’t push the performance needle much and Samsung is showing GAAFET at 3 nm may be very hard to produce with good quality control. It’s not even guaranteed that when they hit sub 2 nm they’ll be able to develop a CFET process on as quick a timetable as they’re planning. So it might make sense to introduce the architecture earlier if you’re behind on node size and seeing what everyone else is struggling with.
IIRC, usa banned the export of GAAFET and lower EDA for China Semiconductor Industry. Any Idea how's going to develop the EDA for the SoC design? Piracy or Huawei Self Developed EDA
 

tokenanalyst

Brigadier
Registered Member
IIRC, usa banned the export of GAAFET and lower EDA for China Semiconductor Industry. Any Idea how's going to develop the EDA for the SoC design? Piracy or Huawei Self Developed EDA
For this kind of new application they know the math, they know how to code and they have the computer power, that it's, imecas and icrd work with local eda,designers and fabs to make sure that the software they develop is integrated seamlessly in their future manufacturing processes.
 

sunnymaxi

Captain
Registered Member
IIRC, usa banned the export of GAAFET and lower EDA for China Semiconductor Industry. Any Idea how's going to develop the EDA for the SoC design? Piracy or Huawei Self Developed EDA
Software is not a big deal for China.. EDA issue has been sorted out.. domestic players taken the lead.

Huawei have developed PCB, CAD & EDA software for 12/14nm process now. Likely to be validated in SMIC's Finfet process.

dasdd.jpg

Chinese EDA champion Empyrean can now "fully support" 7nm; sees 1Q23 sales growth​


Please, Log in or Register to view URLs content!
 

ZeEa5KPul

Colonel
Registered Member
I tried to get clever and look at the data sources in this paper where they'd describe their simulation or experimental setup or whatever it is they were doing to test their model. No such luck, I got shot down:
Data availability. Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.
Ffffuuuu...
 
Top