Well I am not expert in semiconductor but the article clearly said there is way to make 10nm using the new technology by double patterningnop, 7nm u need better mask and optics
china right now can do 22nm which is half a decade behind.
machines come from europe/america
the maximum line width resolution of a single exposure reached 22 nanometers (about 1 / 17 exposure wavelength). On this basis, the project team also combined the high-aspect ratio etching and multi-patterning technology developed by the super-resolution lithography equipment project to realize the processing of feature size graphics below 10 nm.
Wondering, apart from TSMC, Intel, Samsung and GF .. is there any other companies that currently is able to manufacture better than 22nm ?Well I am not expert in semiconductor but the article clearly said there is way to make 10nm using the new technology by double patterning
The semi industry is in a coffin corner for six years now.EUV will not be economic for at least a couple of years. Nearly every process over the last decade has involved ArF (193 nm) light sources. Later water immersion and multiple patterning were used to increase feature detail at the expense of system complexity and, with patterning, of wafer output. The industry was supposed to develop CaF2 (157 nm) light sources as a replacement for ArF at the start of this century. But those never entered production, because of difficulties with the technology, they decided to "leap ahead" to EUV and the industry has been stuck on EUV (13.5 nm) light source R&D for like two decades with little progress made in that time period. I think the Japanese manufacturers of lithography tools were among the last to give up on CaF2 light source research. Had that been persisted with we probably could have been making chips with more wafer output right now.
Because they cannot use lower wavelength light sources the industry has had to play with diffraction masks and multiple patterning. But if you use double-patterning, for example, you halve the amount of wafers output per day. This means your factory's production is cut in half. Today it is common to use quadruple-patterning and more. Further reducing wafer output.