Great achievement, it seems this baby would match the previous best lithography produced by ASML (just before EUV lithography)Here the global times news on the same subject via JSCh
CAS shatters super-res record with latest lithography equipment
Source:Globaltimes.cn Published: 2018/11/30 2:34:10
A researcher shows a device produced with the lithography equipment on November 29. Photo: VCG
Researchers with the Chinese Academy of Sciences (CAS) in Southwestern China's Sichuan Province announced their latest breakthrough after setting a new world-record in lithography resolution nanotechnology on November 29, Xinhua News Agency reported.
Vice-Director Hu Song said the breakthrough shatters traditional research methods by creating new pathways in nanometer optical lithography technology, and China now owns the complete intellectual property rights.
Researchers developed lithography equipment that can produce 10-nanometer chips with double exposure technology.
The tests achieved a world record-setting resolution at 22 nanometers developed by researchers with the Institute of Optics and Electronics at CAS.
Scientists at the Technical Institute of Physics and Chemistry said the project establishes a new research direction in the development of high-resolution and large-scale nanometer lithography equipment, surpassing intellectual property barriers set by foreign countries.
Lithography equipment is essential for chip manufacturing, a sector China is now beginning to emerge.
Higher lithography resolution allows increased chip integration levels; while it is hard to increase resolution through traditional lithography technology due to the optical diffraction effect.
Reports said the super-resolution optical lithography equipment has already proven effective in projects at universities and institutions like Shanghai Academy of Spaceflight Technology, University of Electronic Science and Technology of China, West China Hospital and Shanghai Institute of Microsystem and Information Technology.
Given that 7nm appears to be the limit for silicon based transistors, am I correct in thinking that a triple pattern of 22nm would produce 7nm chips?EUV will not be economic for at least a couple of years. Nearly every process over the last decade has involved ArF (193 nm) light sources. Later water immersion and multiple patterning were used to increase feature detail at the expense of system complexity and, with patterning, of wafer output. The industry was supposed to develop CaF2 (157 nm) light sources as a replacement for ArF at the start of this century. But those never entered production, because of difficulties with the technology, they decided to "leap ahead" to EUV and the industry has been stuck on EUV (13.5 nm) light source R&D for like two decades with little progress made in that time period. I think the Japanese manufacturers of lithography tools were among the last to give up on CaF2 light source research. Had that been persisted with we probably could have been making chips with more wafer output right now.
Because they cannot use lower wavelength light sources the industry has had to play with diffraction masks and multiple patterning. But if you use double-patterning, for example, you halve the amount of wafers output per day. This means your factory's production is cut in half. Today it is common to use quadruple-patterning and more. Further reducing wafer output.