Some friends have already gotten their hands on the Mate70 Pro+ device. Some media outlets have disassembled it, measured the chip size, and evaluated its performance. I was shocked to find that the core chip, Kirin 9020, has made significant progress compared to the Kirin 9000S in the Mate60 Pro. It's expected that when foreign media like TechInsights get the device and cut open the chip for measurement, they will reveal new microscopic discoveries.
Why did I intuitively think the progress wouldn't be too significant? Because it uses DUV lithography for manufacturing, which is obviously much more complicated than EUV lithography and severely limited. It was already challenging to produce the 7nm Kirin 9000S, so it seemed difficult for the Kirin 9020 to make a big leap in performance. I expected small chip improvements but major system-wide advancements in AI, heat dissipation, pure HarmonyOS, etc. The launch event didn't discuss the chip, keeping it mysterious.
However, the Kirin 9020 is truly exceptional. Compared to the 9000S, it's visibly larger in area and notably thicker. The area is 14.5mm16.25mm, clearly larger than the 9000S's 14.614.26, an increase of 14%. The thickness is 0.58mm compared to 0.42mm. I personally guess that the FINFET process platform for chip manufacturing has improved, increasing the number of transistors per unit area, and the device design has changed, making transistors more "three-dimensional".
The FINFET process principle involves growing dense silicon needle-like hairs called fins on a silicon base. Then metal rings called gates encircle each fin. The shape of these fins has become more slender, making them more sensitive to gate control voltage, reducing power consumption, and effectively progressing from 7nm to 5nm equivalent. This is all my speculation, but within expectations.
What's unexpected is that it's become much thicker, likely due to the use of chiplet "chip stacking" and advanced packaging technology. This is impressive, essentially turning a 2D chip into 3D, increasing transistor count in another dimension. Specific details are unknown, but this opens up future development possibilities. We need to strengthen learning in this area, which belongs to advanced packaging technology. It's different from chip manufacturing processes but can significantly enhance chip performance.
The overall effect is that many functions are now integrated into the Kirin 9020. Communication baseband, satellite communication, CPU, NPU neural network computing, GPU, storage, ISP imaging algorithms are distributed among several chiplets, then connected using advanced packaging in planar and vertical arrangements. If it's vertical connection, it's called "chip stacking" in 3D or 2.5D. The connecting lines are very thin and dense, beyond the capabilities of general packaging, requiring advanced packaging. It's less difficult than wafer processing but still challenging. TSMC excels at this. They might have set up an advanced packaging production line within their capabilities.
The integration effect is impressive, with the chip being quite advanced, able to run 6 large games simultaneously without lag. Power consumption is low, with one comparative test showing the Kirin 9020's whole device power consumption at 0.69W, while the Snapdragon 8 Gen 3's was 0.94W. It can run TikTok for 14 hours continuously without overheating and with sufficient battery life.
I guess (all technical information is speculation except for user-tested data) that the Kirin series has found a way to develop continuously, mainly relying on advanced packaging and chip stacking for 3D development. Chip manufacturing processes are still challenging, with 5nm being very limiting. It's said that with persistence, DUV lithography could push to 3nm. But with chiplet technology and chip architecture improvements, overall performance can keep up, performing like a 4nm chip. Currently, production capacity is limited, but advanced chip performance won't be completely stalled.
