Chinese semiconductor thread II

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tokenanalyst

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PATEO and Fuyao University of Science and Technology are jointly developing silicon photonics and fourth-generation semiconductors.​


PATEO and Fujian Fuyao University of Science and Technology (hereinafter referred to as Fuyao University) officially signed a cooperation agreement. At the signing ceremony, Cao Hui, Chairman of Fuyao Group, Ying Yilun, Founder and Chairman of PATEO, and Zhang Fuli, Executive Vice President of Fuyao University, attended as witnesses. Jiang Jianzhong, Dean of the School of New Materials and New Energy of Fuyao University, and Ma Yong, General Manager of the Domestic Business Department of PATEO, officially signed the cooperation agreement on behalf of both parties.

According to the agreement, the two parties will conduct in-depth research on core materials such as fourth-generation semiconductors, electro-optic modulators, and silicon photonics integration , and plan to commercialize the research results. This move accurately targets the intersection of the trillion-dollar track of AI computing power and optical communication, aiming to create a closed loop from " materials to chips to commercial applications ".

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tokenanalyst

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The comprehensive performance evaluation meeting for the National Key Research and Development Program project "Ultra-smooth Manufacturing Technology for Large-Aperture Complex Curved Surface Optical Components" was successfully held.​


The comprehensive performance evaluation meeting for the project "Ultra-smooth Manufacturing Technology for Large-Aperture Complex Curved Surface Optical Components," a key project under the National Key R&D Program "High-Performance Manufacturing Technology and Major Equipment," was successfully held at the Changchun Institute of Optics, Fine Mechanics and Physics. Zhang Mengyue and Lin Pandong, project managers from the Advanced Manufacturing and Modern Service Industry Division of the High Technology Research and Development Center of the National Natural Science Foundation of China, and Zhang Xuejun, Academician of the Chinese Academy of Engineering and Director of the Changchun Institute of Optics, Fine Mechanics and Physics, attended the meeting.

The comprehensive performance evaluation expert group consisted of 10 members, including technical and financial experts. The group first conducted an on-site inspection of the in-situ integrated processing, testing, and manufacturing equipment for large-aperture complex curved surface optical components, as well as verification samples. Following this, a comprehensive performance evaluation meeting was held, chaired by Zhang Mengyue. At the meeting, the expert group listened to the comprehensive performance evaluation report from Academician Zhang Xuejun, the project leader, and reviewed the relevant materials in detail. After in-depth questioning and discussion, the expert group unanimously agreed that the project had completed the research content stipulated in the task book, met the technical indicator assessment requirements, and passed the comprehensive performance evaluation. They also expressed hope that the application and promotion of the results could be further strengthened in the future.

Guan Fengwei, deputy director of the Basic Research Department of the Changchun Institute of Optics, Fine Mechanics and Physics, Wang Hongfeng, deputy director of the Finance Department, and more than 40 project team members attended the meeting.
This project focuses on the needs of fields such as space remote sensing and astronomical observation, and develops in-situ integrated processing, testing and manufacturing equipment for large-aperture complex curved surface optical elements with independent intellectual property rights, and establishes a full-process ultra-smooth manufacturing process system to achieve ultra-smooth manufacturing of large-aperture complex curved surface optical elements.​
 
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算苗科技/Sunmmio taped out first generation 3D TokenPU A4E chip on June 15th.

Uses 3D hybrid stacking of 8 layer of memory wafers vertically stacked atop a compute logic wafer. Interconnect using tSV + micro-bump, shrinking transmission distance from mm to microns. 16 TB/s memory bandwidth.

Uses self-developed RISC-V core

Uses mature domestic node and end-to-end domestic supply chain from design to IP to manufacturing and packaging.

16 TB/s memory bandwidth is seriously fast.
 
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Denebola

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Picture shows design for a hybrid-bonded diamond layering system for high-density 3D-ICs, doping the diamond thin-film with boron to shift it from a passive electrical insulator into an active, p-type semiconductor layer.
This boron-doped diamond (BDD) layer is integrated directly into the hybrid bonding stack alongside copper interconnects, it introduces several unique mechanical, thermal, and electrical advantages.

Lowers the electrical contact resistance at the diamond interface: Allows the diamond layer to act as an integrated ground plane or a direct charge-dissipation layer.
Tuning CTE and Reducing Interface Stress: One of the primary failure modes in hybrid bonding is the massive Coefficient of Thermal Expansion (CTE) mismatch between copper and diamond.
Incorporating boron into the diamond lattice expands the host unit cell slightly, introducing a controlled, uniform tensile strain into the thin film.
This pre-straining can be calibrated to counteract the compressive thermal stress that develops when the hybrid-bonded wafer cools down from its anneal cycle. By modulating the boron concentration, engineers can "tune" the effective mechanical compliance of the layer, reducing wafer-scale warpage and preventing film delamination.
Preserving Thermal Conductivity at Low Temperatures: Substitutes into the lattice with minimal structural distortion and retains a remarkably high thermal conductivity.
Suppression of Interface Leakage and Traps: Introducing boron during the Chemical Vapor Deposition (CVD) phase alters the plasma chemistry. It actively suppresses the formation of amorphous and graphitic phases, forcing the carbon into a cleaner-bonded crystalline matrix. It also eliminates the parasitic leakage pathways and time-dependent dielectric breakdown (TDDB) risks that threaten fine-pitch hybrid bonding layers.










ScreenshotBlueDiamond.jpg
 
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tokenanalyst

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A dual-mode X-ray Diffraction Metrology System with Parallel and Convergent-beam capabilities​

Shenzhen Angstrom Excellence Semiconductor Technology Co. Ltd​

Abstract:​

X-ray reflectivity (XRR) and X-ray diffraction (XRD) measurements were performed using an ÅX-D200 instrument equipped with multiple analytical modules: micro-area X-ray diffraction (μ-XRD), high-resolution XRD(HR-XRD), in-plane XRD, grazing-incidence XRD(GI-XRD), XRR, and X-ray fluorescence (XRF). These complementary techniques were employed to characterize epitaxial silicon germanium (Si1₋xGex) and high-k metal gate (HKMG) materials such as TiN. Sample parameters were determined through fitting of the XRR and XRD curves. The integrated capabilities of the ÅX-D200 enable cross-validation across different measurement modes, providing comprehensive and innovative analysis solutions for advanced semiconductor manufacturing.​

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