I’m confused about process level. Do they mean the performance of the chip is comparable to 3nm process not using Tao Law?
Chinese semiconductor thread II
- Thread starter vincent
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Yes. You don’t need to be advancing in a node shrink to begin EUV adoption. You can for example do an improved (one might even say “proper”) 5 nm process first for example. It’s also just not clear to me that the sudden density jump in 2030 has to be from a process node shrink.
While speculative on my end it’s entirely possible that Huawei could take a tick-tock or maybe tick-tick-tock approach to its own process progression, where a tick would be a feature shrink and a tock would be a fold layer. So maybe one feature shrink with relaxed transistor densities, another feature shrink that’s more optimized, and then a fold layer which employs both advancement in 3D layout and whole process node shrink to get a massive jump in density. Remember also the point of calling it tau scaling is because their performance target is not transistor density itself but compute operation density in unit time for the same energy budget, which is why they don’t just feature transistor density in their roadmap chart but clock speed. We should be asking how they’re consistently improving clock speed for the same energy budget even when transistor density improvements are incremental.
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That's just because 3D NAND is a simpler structure. 3D DRAM is more complicated than 3D NAND. True 3D Logic is eve more complicated once you go beyond chip folding into circuit folding.
But fundamentally, 3D NAND/DRAM/Logic are one thing and HBM, TSMC CoWoS and Intel packaging are something else. One is within 1 die and the other is multiple dies in one package.
To some, the difference may not be too large, that's why you see some people dismissing it, but the level of integration is so much greater in the former. That's how we are getting the higher clock and lower power consumption.
And we have all talked about this many times wrt to process node and EUV, but people continue to not read this, lol.
By the way, I just want to point out what traditional 3D packaging looks like. Notice die to die interconnect on these advanced packages. Whereas what Huawei is doing with folding is more wafer to wafer.
Yes, conceptually it's not groundbreaking. Getting it to work and the equipment to support this is difficult.
I almost find it comical that people say you don't need more advanced equipment to do this. No, the equipment is still advanced, they are just different. The equipment used in 3D NAND production for the 200+ layers aren't the same as what you use in advanced DRAM nodes. The EDA is going to more complicated. The software support is different.
You can shit on Huawei on you want, but they got the software and hardware integration here to work first. TSMC might be the greatest fab ever (according to the TW supporters), but can they actually do 3D Logic without the in-house software team to get this to work?
Thanks for posting this. I skimmed through this video. Some really great slides in there. I'm going to do a write up soon.
But people should take what Huawei did here very seriously.
posted my thread on just the 3D DRAM vs HBM comparison here. It's different things and people should not mistaken advanced 3D Packaging with 3D dies.
Partial Landscape Of The Supply Chain For Advanced Packaging In China.
Naura Technology Group, stated that demand in the domestic logic, memory, and advanced packaging sectors is expected to be strong in 2026. The company maintains an optimistic outlook on the overall order volume and continues to provide key equipment support such as etching and thin film deposition for the packaging and testing industry chain. As hybrid bonding has become a core track in high-end packaging, the company has launched a 12-inch D2W/W2W hybrid bonding device, providing a full-stack 3D integrated solution including etching, deposition, and cleaning.
Tianjin Weice, pointed out that the higher the complexity of a chip, the higher the requirements for professional testing. The value chain focus of advanced packaging is shifting from "packaging" to "testing," and the testing process has become crucial in determining chip performance and reliability. To address the challenges of ultra-high power consumption and high-density interconnects, the company has launched DVS/EVS collaborative verification and AI defect analysis, equipped with wide-temperature-range high-power testing equipment, providing a complete integrated solution. The company aims to rank among the top three global testing companies by 2026.
Jiaocheng Ultrasonic, pointed out that as advanced packaging evolves towards 2.5D/3D and wafer-level packaging, wafer bonding and multiple stacking bring new challenges to quality inspection. Traditional X-ray inspection has bottlenecks, and ultrasonic inspection technology is becoming a key force in solving this problem. The company has launched the Wafer400/Panel600 ultrasonic inspection equipment, which, combined with deep learning algorithms, can solve the detection problems of interface delamination and voids with high precision, achieving domestic substitution.
Xinfeng Precision, shared that as the semiconductor industry continues to evolve towards advanced processes and 3D integration, packaging technology is becoming a key link in improving chip performance. Ultra-precision thinning machines are one of the indispensable key pieces of equipment in the manufacturing process of high-computing-power chips required for artificial intelligence. The company's ultra-precision thinning machine adopts an original, completely new design, achieving ultimate precision and efficiency in the wafer thinning process. With its superior precision control and processing capabilities, it provides strong support for improving chip yield, reliability, and stability, significantly increasing production efficiency and product quality.
Shengmei Shanghai, introduced the challenges and opportunities of electroplating technology in the field of 3D chip integration. Relying on patented technologies such as multi-anode, second anode, intelligent wafer insertion, vacuum pre-wetting, and vacuum cleaning, the company has overcome the challenges of high aspect ratio TSV electroplating and large-size uniformity. The ULTRA series equipment fully supports TSV, HBM, and 2.5D/3D processes, providing domestically developed and controllable electroplating and wet process solutions for 3D integration.
the Grinding and Scraping Equipment Division of Huahai Qingke, pointed out that the company's CMP equipment, thinning equipment, scribing equipment, and edge polishing equipment have completed the leap from technological breakthroughs to large-scale applications in key process links such as 3D IC, and have built a domestic equipment capability covering the entire process of cutting, grinding, and polishing.
the Optical Division of Shanghai Precision Measurement & Testing Co., Ltd., stated that the semiconductor industry is undergoing a major transformation, with chips evolving from "single devices" to "systems engineering." Advanced packaging (whose core challenge lies in overcoming the ultimate challenge of reliable interconnection, driving a revolutionary leap in the demand for metrology methods and precision) is supported by the company's independently developed precision metrology technology, which improves the yield of hybrid bonding and advanced packaging, and promotes a precision revolution in domestic metrology equipment.
E-Core Semiconductor, emphasized that metrology and inspection in advanced packaging has become a crucial link in ensuring yield, performance, and reliability. She shared the company's technological breakthroughs and progress in domestic production of front-end metrology and inspection equipment, contributing to improved yield in advanced packaging. The company has built a full-range metrology system from angstroms to micrometers using a dual "optical + X-ray" technology approach, covering core scenarios such as wafer bonding and 2.5D/3D machining.
Heyan Technology, pointed out by comparing the differences between traditional and advanced packaging processes that advanced packaging places higher demands on precision, cleanliness, and reliability in wafer thinning, dicing, edge trimming, and film bonding/casting. Regarding technological breakthroughs in wafer precision dicing equipment, the company has continuously optimized the precision of its dicing machines from the micron level, launching high-cleanliness edge trimming machines and high-precision dicing machines to meet the needs of high-end processes such as HBM and CoWoS. The company's self-developed key components have broken the monopoly.
Zhongke Feice, pointed out that metrology and inspection equipment is the "eyes and rulers" of semiconductor manufacturing and a core component for yield control. The domestic market size is projected to reach $4.45 billion by 2025, but the localization rate is low. Future metrology and inspection technologies need to improve accuracy and speed, achieve multi-dimensional data fusion, ensure reliability, and directly transform raw data into insightful decision-making. The company's products cover production lines such as CoWoS and HBM, and it has launched a series of equipment for overlay, flatness, and X-ray inspection, accelerating the localization of metrology and inspection.
Vacuum optics collimation system from Nanjing Astronomical Instruments.
A vacuum collimator is a high-precision optical testing device that operates in a vacuum environment. By placing the optical system within a vacuum chamber of 10⁻³~10⁻⁶ Pa, atmospheric refraction, thermal turbulence, and dust interference are completely eliminated. Its core employs a reflective design (such as an off-axis parabolic mirror or an RC system), coupled with precise temperature control (±0.1℃), achieving wavefront accuracy above λ/20 (@632.8nm) and arcsecond-level collimation. It is specifically designed for fields with stringent environmental stability requirements, such as on-orbit calibration of space telescopes and optical inspection of extreme ultraviolet lithography machines, making it a key testing equipment for aerospace optics and cutting-edge micro/nano manufacturing.
Aopu Optoelectronics: The company occupies a core position in securing orders in the field of precision optics.
Fine Mechanics and Physics (CIOMP), is a core force in the field of extreme ultraviolet (EUV) lithography in China and a core force in the domestic optics field, incubating a number of high-precision enterprises. According to the official website of CIOMP, the major shareholder of Aopu Optoelectronics is one of the most important research institutes in the field of optics in China.
It undertakes key projects in extreme ultraviolet (EUV) lithography. Since the 1990s, the Changchun Institute of Optics, Fine Mechanics and Physics (CIOMP) has focused on EUV/X-ray imaging technology research, emphasizing EUV light sources, ultra-smooth polishing technology, EUV multilayer films, and related EUV imaging technologies. In 2002, the Changchun Institute of Optics, Fine Mechanics and Physics (CIOMP) developed China's first EUV lithography principle device. In 2008, EUV lithography technology was listed as a key research task in the National Major Project "32-22nm Equipment Technology Foresight Research." In 2017, the National Major Science and Technology Project "Research on Key Technologies of Extreme Ultraviolet (EUV) Lithography" undertaken by CIOMP successfully passed acceptance, representing the highest level of current applied optics development, and is currently focusing on addressing industrial engineering needs. In April 2023, Bai Chunli, Academician of the Chinese Academy of Sciences, former Party Secretary and President of the Chinese Academy of Sciences, visited CIOMP and inspected its high-throughput gene sequencer, EUV light source, and the 02 Project, among other scientific and technological innovation achievements and research progress, highly praising CIOMP's achievements.
Polishing lithography machine objective lenses is a major challenge. According to the Workers' Daily, Aopu Optoelectronics has developed two pieces of equipment: an aspherical ultra-precision milling machine and a multi-degree-of-freedom rapid polishing machine, capable of processing 2.5-meter diameter optical components. The CNC demonstration base production line for mirror blank milling and polishing can serve the entire civilian sector. According to the Jilin Daily, Aopu has undertaken two national key R&D programs and two major projects of the Ministry of Industry and Information Technology in the past five years, significantly improving its capabilities in large-diameter optical processing and component processing. According to the company's investment information sheet dated May 29, 2024, the surface accuracy and surface roughness of its optical components can reach the nanometer level, placing it at a leading level in China.
Furthermore, the high-precision absolute grating rulers and encoders produced by its holding company, Yuheng Optics, are prerequisites for ensuring the positioning accuracy of the lithography machine's workpiece stage. As a core subsystem of the lithography machine, the workpiece stage system directly affects the yield and overlay accuracy of the three major performance indicators of the lithography machine. Aopu announced that it had signed a "Technology Transfer (Patent Implementation License) Contract" with the Changchun Institute of Optics, Fine Mechanics and Physics (CIOMP), acquiring the right to use related technologies.
In the semiconductor field, according to the 2024 annual report, the incremental reflective ruler achieved a maximum precision of 1μm and has been tested in applications by multiple semiconductor and related users. Three product series have successfully passed prototype trials by key semiconductor companies, with one series achieving small-batch supply. According to the customs information sheet dated April 25, 2025, the company's small-batch supply of high-precision rulers to semiconductor equipment manufacturers has received positive customer feedback, and the testing volume will increase in 2025.