China's AI Counterattack in Semiconductors… Focus on Huawei's Ascend 950 Project
With the daily barrage of news related to Chinese semiconductors, it can be difficult to discern the key issues. If you want a quick overview of the current landscape of China's semiconductor industry, look no further than Huawei's Ascend 950 AI chip project.
The Ascend 950, initially unveiled in September 2025 and scheduled for mass production in the first half of 2026, aims to compete with NVIDIA's H100. Considering memory speed, power efficiency, and software ecosystem, the Ascend 950 is estimated to deliver approximately 80% of the H100's performance. If the Chinese semiconductor industry succeeds in mass production of the 950 chip by 2026, it will have significant implications.
The Significance of the Ascend 950
The reason China, which has fallen behind in the race for advanced processing technologies, is betting everything on the Ascend 950 is simple. Unlike "AI training," which demands extreme performance, "AI inference," the actual service implementation stage, can deliver competitive performance even with a 7nm process.
While it's easy to lump AI computations together, AI training and inference are completely different in nature and difficulty. AI training requires endlessly modifying hundreds of billions of parameters, repeatedly adjusting values until the correct answer is found. This requires high-precision computational power that tolerances even the slightest error, along with overwhelming memory bandwidth to support it. Conversely, AI inference involves inputting data into a pre-built AI model to produce results. It doesn't require the extreme computational power of AI training, and smooth service delivery is possible with relatively low precision. This means that even a 7nm chip from the Huawei-SMIC alliance can be a viable solution, even without the cutting-edge 3nm process.
The Ascend 950 offers economic advantages. The Ascend 950's performance is expected to be 80% that of the NVIDIA H100, but its price is expected to be less than 50% of that of the NVIDIA chip. For Chinese companies considering data throughput relative to budget, the Ascend 950 will be an attractive option.
Furthermore, the importance of inference chips is growing from a commercial perspective. This is because the hegemony of the AI chip market is likely to shift to inference chips. While AI training was more important until 2025, inference chips are expected to account for nearly 80% of the global AI semiconductor market by 2030. This is because trained AI, rather than AI training, will be the foundation for a variety of AI services in areas such as shopping, education, healthcare, and administration.
The success of the Ascend 950 will serve as a catalyst for significantly expanding the market dominance of Chinese semiconductor companies. With demand for AI semiconductors in China projected to surge from approximately $40 billion in 2025 to $100 billion in 2030, if domestic companies' market share increases from the current 20% to 50% by 2030, related sales will grow by more than sixfold, from $8 billion to $50 billion. The assumption of a 50% market share is based on the expectation that domestically produced chips, led by the Ascend series, will demonstrate sufficient technological maturity and performance in the AI inference field.
Four Challenges the Huawei Alliance Must Address
The path to successful mass production of the Ascend 950 chip by 2026 is arduous. The Huawei Semiconductor Alliance must overcome the following four technological challenges:
1) Foundry
The first and most critical challenge is to increase the yield of SMIC's N+3 process (7/5nm) to at least 50%. Unable to import EUV, the most advanced lithography equipment, due to US sanctions, China is attempting to utilize DUV, the previous generation of equipment. Currently, SMIC is the only company in the world attempting to achieve 5nm-level microfabrication using only DUV equipment. The core of this strategy is a multi-patterning process, which uses DUV lithography to laminate circuits four or more times. This increases the number of process steps by more than three times compared to using EUV equipment, inevitably leading to lower yields.
SMIC is circumventing this issue with a design-process optimization strategy. Huawei's design team intentionally adjusts chip designs to account for the foundry's lower process precision. This approach results in a slightly larger chip size, but ensures a meaningful yield. The resulting cost increase is offset by subsidies from the Chinese government's semiconductor fund.
2) HBM
The next important challenge is achieving self-sufficiency in high-bandwidth memory (HBM), which is banned from import due to US sanctions. Huawei plans to establish a system to source HBM3 from domestic companies, including CXMT (Changxin Memory) and Fujian Jinhua (JHICC), for mass production of the Ascend 950.
As of 2026, China's HBM technology is estimated to have entered the mass production stage of HBM3, the fourth generation. Compared to Samsung Electronics and Hynix, which have already begun production of the sixth generation (HBM4), there is a technology gap of approximately 1.5 generations. However, successful mass production of HBM3 is sufficient for creating AI chips for inference.
CXMT, a leader in China's DRAM industry, is believed to have recently increased HBM3 yield to around 50%. Fujian Jinhua lags behind Changxin Memory, but through a close partnership with Huawei, it is preparing a "custom HBM3" optimized for the Ascend 950 architecture.
3) Packaging
The final hurdle for Ascend 950 production is securing advanced packaging technology, namely CoWoS (Chip on Wafer on Substrate), which organically combines the GPU and HBM. SiCarrier and Tungfu Micro (TFME) are working together to address this challenge. SiCarrier, Huawei's semiconductor equipment subsidiary, developed the interposer exposure and etching solution, a key component of packaging, while Tungfu, China's largest OSAT company, is responsible for final manufacturing based on this solution.
4) General Equipment
The advancement of equipment manufacturers such as NAURA, AMEC, and Hwatsing has been a significant contributor. NAURA's etching and deposition equipment has become an essential component of semiconductor production lines in China. To overcome the risks of relying on imported core components in the past, NAURA has been aggressively nurturing its subcontractors over the past three years through its "Component Localization Fund." We are supplying customized equipment optimized for Huawei's Ascend 950 line.
If Huawei succeeds in mass production of the Ascend 950 in 2026, this will be more than just a new product announcement. It will symbolize the establishment of China's advanced semiconductor supply chain, spanning SMIC (manufacturing), CXMT (memory), SiCarrier and Tongfu Micro (packaging), and Nowra (equipment). This ecosystem, established by Huawei, will not only foster the shared growth of companies within the alliance but also serve as a catalyst for the advancement of emerging AI chip design companies like Cambricon.
After Mass Production of the Ascend 950
Of course, the successful mass production of the Huawei Ascend 950 will not solve the challenges facing China's semiconductor industry overnight. There is still a three- to four-year (more than 1.5 generations) lag behind NVIDIA's latest architectures, and Huawei will likely continue to rely on NVIDIA, particularly in the ultra-large "learning chip" market, which demands extreme computing power. The current state of China's AI industry is one where, thanks to the recent relaxation of US H200 import restrictions, it must rely on imports for some quantities or utilize bypass methods such as data centers built in the ASEAN region.
Currently, the possibility of mass production of the Ascend 950 is relatively high. However, the true test will be the Ascend 960 project after 2027. The Ascend 960 aims to surpass the NVIDIA H200 and reach 70-80% of the Blackwell (B200) performance. However, it is premature to assess the probability of success due to numerous technical challenges, including the limitations of microfabrication and the difficulty of high-performance packaging.