Chinese semiconductor thread II
- Thread starter vincent
- Start date
Tianjue Technology plans to acquire 4% of Suzhou Sihang, a manufacturer of wafer front-end defect inspection equipment, for RMB 25 million
Suzhou Tianjue Technology Co., Ltd. (stock abbreviation "Tianjue Technology") issued an announcement stating that the company plans to jointly acquire 4% of the equity of Suzhou Sihang Semiconductor Technology Co., Ltd. (hereinafter referred to as "Suzhou Sihang") held by Wuxi Chengyun Enterprise Consulting Management Co., Ltd. (hereinafter referred to as "Wuxi Chengyun") with Wuhan Yuanxia Equity Investment Partnership (Limited Partnership) (hereinafter referred to as "Wuhan Yuanxia"), Zhu Changhua and Cai Xiongfei.
The announcement shows that Tianjue Technology plans to acquire the 0.54% equity of Suzhou Sihang that has been paid by Chengyun (corresponding to a registered capital of 678,831 yuan) for RMB 8,870,968, and acquire the unpaid 1.08% equity of Wuxi Chengyun (corresponding to a registered capital of 1,357,662 yuan) for RMB 0, and fulfill subsequent capital contribution obligations and pay a capital contribution of RMB 16,129,032 to Suzhou Sihang. Tianjue Technology will pay a total of RMB 25 million.
After the completion of this transaction, Tianjue Technology's equity ratio in Suzhou Silicon Bank increased from 11.83% to 13.45%, and Cai Xiongfei's equity ratio in Silicon Bank increased from 8.71% to 9.49%.
It is understood that Suzhou Silicon is mainly engaged in the research and development, production and sales of wafer front-end defect detection equipment and components. Since its establishment, it has successively released three generations of bright field nano-pattern wafer defect detection equipment products, including TB1000 for 65nm process nodes, TB1500 for 40nm process nodes, and TB2000 for 14nm process nodes, some of which have received formal orders from customers.
VeriSilicon's scalable, high-performance GPGPU-AI computing IP enables automotive and edge server AI solutions
VeriSilicon today announced the latest progress of its high-performance, scalable GPGPU-AI computing IP, which now provides strong empowerment for the next generation of automotive electronics and edge server applications. By combining programmable parallel computing capabilities with artificial intelligence (AI) accelerators, these IPs can efficiently support complex AI workloads such as large language model (LLM) reasoning, multimodal perception, and real-time decision-making in a thermal and power-constrained environment.
VeriSilicon's GPGPU-AI computing IP is based on a high-performance general-purpose graphics processor (GPGPU) architecture and integrates dedicated AI accelerators to provide excellent computing power for AI applications. Its programmable AI accelerator and sparse-aware computing engine can accelerate the operation of matrix-intensive models such as Transformer through advanced scheduling technology. In addition, these IPs support a variety of data formats for mixed-precision computing, including INT4/8, FP4/8, BF16, FP16/32/64 and TF32, and support a variety of high-bandwidth interfaces, including 3D stacked memory, LPDDR5X, HBM, PCIe Gen5/Gen6 and CXL. The IP also supports multi-chip and multi-card expansion deployment, has system-level scalability, and meets the deployment requirements of large-scale AI applications.
VeriSilicon's GPGPU-AI computing IP natively supports mainstream AI frameworks such as PyTorch, TensorFlow, ONNX, and TVM, covering training and reasoning processes. In addition, it also supports the general computing language (GPCL) compatible with mainstream GPGPU programming languages, as well as mainstream compilers. These capabilities are highly consistent with the current requirements of large language models in terms of computing power and scalability, including representative models such as DeepSeek.
VeriSilicon's GPGPU-AI computing IP is based on a high-performance general-purpose graphics processor (GPGPU) architecture and integrates dedicated AI accelerators to provide excellent computing power for AI applications. Its programmable AI accelerator and sparse-aware computing engine can accelerate the operation of matrix-intensive models such as Transformer through advanced scheduling technology. In addition, these IPs support a variety of data formats for mixed-precision computing, including INT4/8, FP4/8, BF16, FP16/32/64 and TF32, and support a variety of high-bandwidth interfaces, including 3D stacked memory, LPDDR5X, HBM, PCIe Gen5/Gen6 and CXL. The IP also supports multi-chip and multi-card expansion deployment, has system-level scalability, and meets the deployment requirements of large-scale AI applications.
VeriSilicon's GPGPU-AI computing IP natively supports mainstream AI frameworks such as PyTorch, TensorFlow, ONNX, and TVM, covering training and reasoning processes. In addition, it also supports the general computing language (GPCL) compatible with mainstream GPGPU programming languages, as well as mainstream compilers. These capabilities are highly consistent with the current requirements of large language models in terms of computing power and scalability, including representative models such as DeepSeek.
Zhongxin Wafer's 12-inch polishing wafer is officially put into production
According to the official microblogs of Lishui Economic Development Zone and Zhongxin Wafer, on June 7, Zhejiang Lishui Zhongxin Wafer Semiconductor Materials Co., Ltd. held a 12-inch polishing wafer production line ceremony, marking the official mass production of the first batch of 12-inch polishing wafers in the city by Lishui Economic Development Zone. Zhongxin Wafer's polishing project in Lishui uses the most advanced production technology in the world. The successful production line of 12-inch polishing wafers is of milestone significance, marking that Zhongxin Wafer has realized the full process of "crystal growth + cutting, grinding and polishing" production and manufacturing of 12-inch large silicon wafers in Lishui.
It is reported that Zhejiang Lishui Zhongxin Wafer Semiconductor Materials Co., Ltd. was established in 2022 and successfully rolled off the city's first 12-inch perfect single crystal ingot in December last year. Six months later, the city's first batch of 12-inch polished wafers were successfully put into production. The project is expected to reach the planned monthly production capacity by the end of this year, and annual sales after reaching full production will exceed 2 billion yuan.
Lishui Economic and Technological Development Zone said that the successful production of the first batch of 12-inch polished wafers from Zhongxin Wafer fully demonstrated the development results of the Economic and Technological Development Zone's layout of a characteristic semiconductor industry chain with key materials as the core.
Kaixin Semiconductor Project started construction in Zhangjiagang
Suzhou Kaixin Semiconductor Materials Co., Ltd. laid the foundation stone for the new project of annual production of 30,000 tons of semiconductor special materials and 13,500 tons of supporting materials. Lu Chongmin, member of the Standing Committee of Zhangjiagang Municipal Party Committee, deputy secretary of the Party Working Committee of the Free Trade Zone, and deputy director of the Management Committee, Lu Dingfeng, member of the Party Working Committee of the Free Trade Zone and secretary of the Discipline Inspection and Supervision Working Committee, and Zhang Jinshan, chairman of Feikai Materials, attended the event.
As the "pearl" at the top of the pyramid of modern industry, the semiconductor industry has always been a key specialty industry cultivated by Zhangjiagang Free Trade Zone. Over the years, Zhangjiagang Free Trade Zone has carefully planned and cultivated a number of well-known companies in the industry, such as Merck, Rainbow, and Vanset, and is increasingly becoming an innovative highland for the development of the semiconductor industry in the Yangtze River Delta.
Suzhou Kaixin Semiconductor Materials Co., Ltd. has newly built a project with an annual output of 30,000 tons of semiconductor special materials and 13,500 tons of supporting materials. Its products include photoresist, plating solution, stripping solution, developer, cleaning solution, etching solution, PI, TARC, BARC, nano-fluorination solution, etc. Its downstream customers are mainly large packaging and testing manufacturers.
13.5nm femtosecond laser damage behaviors of EUV multilayer mirrors
Abstract
We present laser damage behaviors of a series of high reflectivity extreme ultraviolet (EUV) mirrors with radiation of 13.5 nm femtosecond laser pulses generated by Shanghai Soft X-ray Free-Electron Laser (SXFEL) facilities. Mo/Si multilayer mirrors with and without B4C barrier layer of different designs were prepared by magnetron sputtering. The reflectivity of the mirrors was tested in National Synchrotron Radiation Laboratory of China at Hefei. A FEL-EUV laser damage testing station were designed and established in SXFEL. The 10Hz pulse train was delivered and focused to target plane with about 400μm2, and multi-shot damage behaviors of the witnesses were characterized. The damage morphologies were mapped comprehensively by several tools, including microscope, white light interferometer, SEM, TEM and Raman spectrum. The special bubble-like damage and compaction of multilayers were analyzed. |
Utilization of wave front sensing techniques for EUV damage studies
Abstract
Current optics damage and materials processing by EUV radiation are mainly relying on the free-electron-laser (FEL), synchrotron and laser produced plasma (LPP) light sources. The damage profiles are evaluated by the SEM, TEM, AFM and XPS etc. approaches. Subsequently, the damage threshold are given according to the pulse energy and the sample damage profiles, which remains some uncertainty. We have developed a high numerical aperture (NA~0.15) Hartmann wave front sensor for the EUV spectral region. This sensor has been successfully used for the EUV microscopy and sample damage study at FLASH-II. It firstly characterizes the beam spatial quality. The real-time measurement of the FEL wave front directly conducts the Schwarzschild optics alignment. With the benefit of capturing intensity and phase simultaneously, the EUV focus and beam profiles at the sample location can be precisely retrieved via retro-propagation. The wave-front sensing technique improves the EUV focusing quality, ensures sufficient power density, accurately provides full dose map of the sample damage area. The FEL-based EUV damage study is lack of the important dynamic information from femtosecond to picosecond time scale due to the synchronization limitations. Although there are a few EUV pump-IR/green-light-probe experiments have been performed, the long wavelength probe beam is inadequate to access the ultrafast process and the coating depth. By utilizing the wave-front sensing technique, the table-top EUV sources, such as gas-/surface-plasma-based high harmonics and plasma-based soft-x-ray lasers, could reach brilliant focus allowing to damage the samples. With the advantage of laser driven EUV sources, the EUV pump-EUV probe scheme can be realized with femtosecond-level delay. The wave-front sensing techniques are applicable for both pump and probe beams, have the potential to open a new era for EUV damage studies. |
I really hope that Chinese companies don't sleep in the laurels and start to moving to a more localized workflow. The US stooges are too unpredictable.