The paper on storage and computing integrated chip of the Institute of Microelectronics of the Chinese Academy of Sciences was selected for the ISSCC 2025 conference
The team led by Researcher Zhang Feng from the National Key Laboratory of Integrated Circuit Manufacturing Technology has designed a transposable approximate and precise dual-mode floating-point storage and computation integrated macro chip. Through the proposed cyclic weight mapping SRAM scheme, the chip can reuse the multiplication and addition units during forward and backward propagation, and while realizing the transposition function, it greatly improves the energy efficiency and computing power density compared to the previous transposition storage and computation integrated macro unit. Through the proposed signed fixed-point mantissa encoding method and vector granularity pre-alignment scheme, the chip achieves compatible support for multiple floating-point and fixed-point number systems, and has a smaller precision loss than the traditional coarse-grained floating-point pre-alignment scheme. Through the proposed approximate and precise dual-mode multiplication and addition circuit design, the chip can turn on the approximate mode in the inference link with low precision requirements, thereby obtaining a 12% speed increase and a 45% energy consumption reduction, and can turn on the precise mode in the training link with high precision requirements to ensure no precision loss.