Chinese semiconductor thread II

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Prof. Fei Su is a tenured professor and the Xing-Hua Endowed Chair Professor at the School of Integrated Circuits, Tsinghua University. He received the B.E. and M.S. degrees from Tsinghua University, in 1999 and 2001, respectively, and the Ph.D. degree in electrical and computer engineering from Duke University in 2006. From 2006 to 2025, he was the integrated circuit architect at Intel Corporation. In 2025, he joined the school of Integrated Circuits, Tsinghua University.

His main research interests include integrated circuit testing, DFX (Design-for-Testability, Design-for-Dependability), SLM (Silicon Lifecycle Management). He is dedicated to advancing innovations from the circuit level to the architectural level, addressing critical challenges in silicon testability, reliability, availability and serviceability (RAS), safety, security, and computing resilience. His research has been applied to numerous chip products with significant industry impact. Technical innovations have led to multiple international patents in areas such as 3D chip/chiplet testing, analog chip functional safety, and intelligent sensors.

He has been actively involved in standardization of advanced research, having contributed to the development of several IEEE standards. He served as an industry mentor for multiple academia–industry research projects under the Semiconductor Research Corporation (SRC), and received the 2021 SRC Mahboob Khan Outstanding Industry Liaison Award. He was the recipient of multiple best paper awards, including the IEEE Circuits and Systems Society Outstanding Young Author Award and the IEEE International Conference on VLSI Design Best Paper Award. He has served on program and organizing committees of leading IEEE/ACM conferences (e.g., DAC, ITC, VTS, ETS), and as Associate Editor of IEEE Design and Test.
 
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