Remember the 7nm crypto miner chips are what we KNOW SO FAR.
Chinese semiconductor industry
- Thread starter Hendrik_2000
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Just don't even respond.
Leave it.
@tonyget bro how about this from DigiTimes circa June 14 2022. Like I said the US hates being outcompete especially coming from a Chinaman.
DigiTimes: YMTC skips 192L and goes straight to 232L 3D NAND
Jun 14, 2022297
So far it's just a rumour: According to sources from DigiTimes, the Chinese NAND flash manufacturer YMTC will skip the 192-layer generation and go directly to the next generation with 232 cell levels. In terms of the number of layers of 3D NAND, YMTC would catch up with Micron.
In the report (paywall), DigiTimes refers to industry sources from China. So far, however, there has been no confirmation of the alleged plans.
Does YMTC omit 192 layers?
Only a month ago, DigiTimes reported on the first sample chips (samples) of YMTC's 192-layer generation. If the information is correct, this chip design will not reach the market. Whether this means problems with the 192-layer NAND can only be speculated about. On the other hand, the development of 232-layer NAND could be finished faster than expected and therefore get priority. However, it is not mentioned when the 232-layer NAND from YMTC should reach the market.Micron has already arrived at 232 layers
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In terms of the number of levels of memory cells in 3D NAND, Micron is currently the leader. The US manufacturer unveiled its 232-layer NAND just last month, which is expected to go into volume production later this year. The storage capacity of 1 terabit per die in the TLC variant with 3 bits per cell is twice as high as with previous TLC-NAND on the market.
Micron's new 232-layer NAND (Image: Micron)
Samsung and SK Hynix, the two major NAND flash manufacturers from South Korea, are not expected to exceed the 200-layer mark in mass production until next year.
In the layer race, the partners Kioxia (Japan) and Western Digital (USA) have fallen behind and only want to offer more than 200 layers in the “BiCS+” generation planned for the end of 2023.
The number of layers alone is not very meaningful
However, both recently and rightly emphasized that the number of the cell layers alone says little about the 3D NAND, because many other factors such as the size of the cells and their spacing determine the properties of the NAND flash. Despite only 162 layers, the new BiCS6 generation is said to offer a higher bit density than the 176-layer chips of the competition.
YMTC was underestimated
Whether 192 layers or directly 232 layers: The newcomer Yangtze Memory Technologies Co. (YMTC) from China was underestimated by many. YMTC's 128-layer NAND received recognition in an analysis by TechInsights experts. The YMTC stated that they had caught up with the established competition from South Korea, Japan and the USA. In terms of areal density and throughput, the so-called Xtacking architecture from YMTC is particularly strong. The area with memory cells and that with the periphery (I/O) are each produced on different wafers and then combined into a 3D NAND chip.
After initial difficulties with a low yield of functioning memory chips, the “yields” are now said to be at a satisfactory level, so that output has been increased to 100,000 wafers, DigiTimes reported again in May. According to unconfirmed reports, Apple is already being traded as a potential major customer.
Why don't you stop entertaining this fella. Seriously half the reason why he exists is because you keep pumping out phds in response to his posts.
He is the irritating grain of sand that causes a pearl to form. Despite his best efforts, he actually does serve a purpose.
The other sign that they have succeeded in implementing 232L is the sudden sanctions coming in from US. US senators send a letter to Commerce department on July 28 requesting for the YMTC blacklist.
Degree of US sanctions is proportional to Chinese success in developing an indigenous semiconductor ecosystem; so far, it's looking really good.
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